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Date | Owner | Revision | Notes | ||||||
|---|---|---|---|---|---|---|---|---|---|
| Noam Weidenfeld | 1.0 | Initial release | ||||||
| Noam Weidenfeld | 1.1 | Revision update | ||||||
| Shahar Fridman | 1.2 | Add Power Consumption Measurement | ||||||
Table of Contents |
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Single 5V power source.
NXP’s PF4210 source most of the IMX-8 power rails.
Two discrete DC-to-DC converters source the CPU SOC and ARM powers.
SNVS_3V3 can’t be power by a battery (No separate input).
3.3V output up to 2A (Need to calculate system and SOM power).
Power up sequence is supported by the PMIC configuration.
Power Consumption
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Mode
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Voltage
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Current
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Power
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Idle, Linux up
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5V
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324mA
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1.62W
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Linux up, wifi connected to 2.4GHz and sending packets by iperf3
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5V
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480mA
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2.4W
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Linux up, wifi connected to 5GHz and sending packets by iperf3
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5V
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576mA
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2.88W
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Linux up, scanning for bluetooth device
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5V
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336mA
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1.68W
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Linux up, GPU stress by glmark2
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5V
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660mA
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3.3W
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Linux up, CPU stress to maximum
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5V
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660mA
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3.3W
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All utilities are active in the same time (Wifi, GPU stress, CPU stress, Bluetooth)
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5V
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924mA
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.
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Reset
The i.MX8M POR signal is activated by the PMIC output. The following figure describes the reset architecture.
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